Director - AI Infrastructure Systems

📋 Description

• • Lead the establishment and scaling of Axelera AI’s AI Infrastructure Systems division within the AI Integrated Systems (AIS) group, building a multidisciplinary team from the ground up covering hardware architecture, PCB design, power/thermal/mechanical engineering, firmware, and platform validation.
• • Define and own the technical roadmap for server-class AI platform products including PCIe Gen6/CXL accelerator cards, OAM modules, UBB baseboards, 1U/2U rack systems, and evolving rack-scale solutions with integrated networking and storage architectures.
• • Serve as the technical authority across system implementation, reviewing and approving schematics, PCB stack-ups, high-speed signaling (PCIe Gen5/6, CXL, SerDes), enterprise memory topologies, power delivery systems, VRM design, and SI/PI methodologies.
• • Own end-to-end delivery of platform systems from concept through design reviews, bring-up, validation, reliability qualification, DFM/DFT/DFR, and mass-production readiness, including NPI and ramp with tier-1 contract manufacturers and ODMs.
• • Make strategic build-vs-partner decisions for each program, leading in-house design where it differentiates Axelera’s technology and co-designing with ODMs where scale or time-to-market requires partnership.
• • Lead the development of datacenter-grade platform systems with BMC-based management, Redfish/IPMI compliance, UEFI/BIOS firmware, secure boot, root-of-trust architecture, platform firmware resilience, and enterprise RAS features.
• • Define and execute thermal and mechanical strategies for high-power AI accelerator platforms, including air-cooled 1U/2U chassis designs and immersion-ready or direct liquid cooling (DLC) variants.
• • Collaborate closely with Embedded AI engineering leadership to align board and system-level execution, sharing reference designs, validation assets, and CM/ODM relationships across product lines.
• • Partner with Platform Architecture, Product Management, Silicon, and Voyager SDK teams to refine platform requirements such as memory topology, interconnect standards, power states, and telemetry to fully showcase accelerator capabilities at rack and cluster scale.
• • Engage directly with hyperscalers, sovereign AI operators, European HPC centres, OEMs, and system integrators to shape customer requirements, win design-ins, and drive strategic adoption.
• • Establish and enforce engineering processes, documentation standards, validation protocols, and quality gates aligned with Axelera’s New Product Development (NPD) framework.
• • Identify, escalate, and resolve technical risks and engineering bottlenecks during development, qualification, and early production; lead root-cause analysis for critical failures.
• • Manage the division’s engineering budget, CAPEX allocations, external engineering spend, and vendor relationships with CMs, ODMs, and component suppliers.
• • Maintain hands-on involvement in technical reviews: analyze schematics, PCB layouts, simulation outputs, lab bring-up data, and validation results to guide team decisions and resolve complex technical issues.
• • Drive compliance with PCIe and OCP standards, datacenter infrastructure requirements, and relevant regional regulations for AI infrastructure deployment.
• • Foster a culture of innovation, ownership, and accountability within the team, enabling rapid iteration and execution in a fast-paced, high-growth environment.